Fall 2016: Upcoming Seminars

  • Title: Superconducting Single Flux Quantum Electronics: Solving Energy Problem in High-End Computing
          Speaker: Dr. Oleg Mukhanov
  •       Date: Friday, Jan. 27th, 2pm, Kent 413

  • Title: Microelectronics for Radiation Detectors
          Speaker: Dr. Gianluigi De Geronimo
  •       Date: Friday, Mar. 10th, 2pm, Kent 413

  • Title: Time Varying Circuits for Radio Receiver Applications
          Speaker: Prof. Sudhakar Pamarti
  •       Date: Friday, Mar. 31st, 2pm, CEPSR 750

  • Title: From Low power to Predictive Analytics for VLSI - Beyond Guessing
          Speaker: Dr. Rajiv Joshi
  •       Date: Friday, Apr. 21st, 2pm, CEPSR 750

    Dr. Oleg Mukhanov
    Friday, Jan. 27th, 2:00pm-3:00pm
    Kent 413
    Superconducting Single Flux Quantum Electronics: Solving Energy Problem in High-End Computing

    The explosive growth of the Internet transformed data centers into large industrial scale computer facilities with extraordinarily high energy demands. From Google and Facebook to banking, cloud computing and supercomputing, an average data center already use as much electricity as a medium-size town. Besides just high energy costs, there is a compelling technical reason to improve energy efficiency of computing technologies. The development of the next generations of high-end computers will not be possible unless a significant improvement in energy efficiency is achieved over the technology available today. The heart of the problem is in a relatively low energy-efficiency of current computer circuit technologies consuming too much energy for computing, storing and moving data between processors and memories. Superconducting Single Flux Quantum (SFQ) technology is viewed as a possible Beyond-Silicon technology at a relatively matured stage of the development. I will review several key innovations happened just within last few years which dramatically increased a potential of superconductivity addressing known critical problems which prevented the use of superconductivity in high-end computing in the past. Superconducting SFQ digital circuits by virtue of their inherent low power dissipation, high speed, lossless interconnect present an excellent opportunity to dramatically increase energy efficiency of high-end computing. The long-standing memory problem is being addressed by a new class of cryogenic spintronics devices capable of co-integration with SFQ circuits and new superconducting spintronics elements, in which competing superconducting and magnetic order parameters co-exist to deliver new opportunities for electronics.

    Dr. Oleg Mukhanov, Chief Technology Officer and Sr. EVP at Hypres, Inc. He received the Ph.D. in physics (1987) from Moscow State University and the M.S. in electrical engineering (1983) from Moscow Engineering Physics Institute (with honors). Dr. Mukhanov has more than 30 years of experience in superconducting electronics. He joined Hypres in 1991 to initiate the development of Rapid Single Flux Quantum (RSFQ) superconductor circuit technology, which he co-invented in 1985. Prior to Hypres he was a staff scientist in Moscow State University developing the RSFQ technology basis. Over the years at Hypres, Dr. Mukhanov has initiated and led many projects on high-performance superconductor digital, mixed signal, and analog circuits. These include circuits and devices for data processors and memory, radio frequency signal reception, signal and time digital processing, cryogenic interfaces for a variety of applications including wireless communications, radar, electronic warfare, instrumentation, and high-end computing. He was a designer of a number of the world’s fastest digital circuits. He co-invented Digital-RF architecture and led the development of the world’s first cryocooled Digital-RF receiver system. He also co-invented and led the development of new generation of energy-efficient single flux quantum technology and superconducting ferromagnetic random access memories for energy efficient computing systems. Dr. Mukhanov authored and co-authored over 160 scientific papers, book chapters and over 20 patents. He is a member of advisory committees of international conferences and institutions on superconducting electronics, was chair and member of organizing and program committees of many national and international superconductor electronics conferences. In 2005-2007, Dr. Mukhanov was a president of the US Committee on Superconducting Electronics. He is an editor of IEEE Transactions of Applied Superconductivity and received an IEEE outstanding service recognition as an editor of special issues of this journal. Dr. Mukhanov is a Fellow of IEEE and member of American Physical Society. He is the recipient of The IEEE Award for Continuing and Significant Contributions in the Field of Small Scale Applied Superconductivity (2015).

    Dr. Gianluigi De Geronimo
    Brookhaven National Laboratory
    Friday, Mar. 10th, 2:00pm-3:00pm
    Kent 413
    Microelectronics for Radiation Detectors

    Radiation detectors find application in several areas, the most prominent being medical imaging, national security, safeguard, and physics research. In order to achieve a high resolution, these detectors require specialized low-noise electronics, also known as front-end electronics. This seminar presents the most relevant technical and non-technical aspects of front-end electronics design for radiation detectors. The concepts of low-noise charge amplification, pulse shaping and equivalent noise charge are introduced.
    Front-end application-specific integrated circuits are regarded as a critical enabling technology without which both present and future radiation detector developments would be impossible. The deep knowledge of this specialized front-end design has traditionally belonged to a very limited number of research groups and institutions worldwide. A major challenge comes from the dramatic increase in demand, combined with the need for higher resolving capability, functionality and portability. These stringent requirements push the state-of-the-art to the limit and calls for continuous innovation. The rapid evolution of front-end ASICs is discussed and state-of-the-art developments are shown.

    Gianluigi De Geronimo received his Ph.D. in microelectronics from Milan Polytechnic in 1997. Shortly after that he joined the Instrumentation Division of Brookhaven National Laboratory, NY, where he specialized in the design of front-end integrated circuits for radiation detectors. He successfully developed several state-of-the-art ASICs implementing innovative circuits and frequently achieving record performance. He collaborates with several institutions and industries and is co-author of over 130 scientific publications and two book chapters.
    Dr. De Geronimo is a Visiting Research Scientist with the Nuclear Engineering and Radiological Sciences Department at the University of Michigan and an Adjunct Professor with the Electrical and Computer Engineering Department at the Stony Brook University where he teaches a course on microelectronics for sensors, and mentors of several MS and Ph.D. students. Recipient of the 2008 BNL Science and Technology Award, 2012 CSIRO Award, 2012 Battelle Inventor of the Year Award, and 2009, 2011, and 2014 R&D 100 Awards, he holds 20 patents and records of invention. He is editor of IEEE Transactions on Nuclear Science and reviewer for various journals and government institutions.

    Prof. Sudhakar Pamarti
    Friday, Mar. 31st, 2:00pm-3:00pm
    CEPSR 750
    Time Varying Circuits for Radio Receiver Applications

    Recently, various ultra-low power applications such as wearable devices, biomedical devices and Internet-of-Things (IoT) have been developed opening up a new domain of integrated circuits design. In these applications, ultra-low power circuit techniques for improving the energy efficiency have been the main research focus. One of the most challenging blocks in ultra-low power systems is SRAM. A number of state-of-the-art circuit techniques have been proposed to tackle the ultra-low power SRAM design issues. In this talk, I will briefly explain various design issues in SRAM followed by various state-of-the-art design techniques. Some recent research works from my research group in NTU will also be introduced.

    Sharp, programmable, linear, integrated filters are enabling components for software defined and cognitive radio applications. However, they are difficult to realize: SAW and MEMS based filters are sharp and linear but not very programmable; active filters can be sharp and programmable but are not very linear; sampled charge domain filtering is sharp and programmable but the burden of the linearity is on the front end voltage-current converter. This talk descirbes an alternative approach that uses time-varying (as opposed to time-invariant) circuits to realize sharp, programmable, linear, integrated filters. The technique exploits sampling aliases to effectively realize very sharp, linear filtering prior to sampling. This talk will describe the basics of this time-varying circuit design approach and illustrates its application to radio front-ends and spectrum scanners. Measurement results from recent prototype integrated circuits will also be presented.
    Dr. Sudhakar Pamarti is an associate professor of electrical engineering at the University of California, Los Angeles. He received the Bachelor of Technology degree in electronics and electrical communication engineering from the Indian Institute of Technology, Kharagpur in 1995, and the M.S. and the Ph.D. degrees in electrical engineering from the University of California, San Diego in 1999 and 2003, respectively. Prior to joining UCLA, he has worked at Rambus Inc. (‘03-`05) and Hughes Software Systems (‘95-`97). Dr. Pamarti is a recipient of the National Science Foundation’s CAREER award for developing digital signal conditioning techniques to improve analog, mixed-signal, and radio frequency integrated circuits. Dr. Pamarti currently serves as an Associate Editor of the IEEE Transactions on Circuits and Systems I: Regular Papers and as a member of the CICC Technical Program Committee.

    Dr. Rajiv Joshi
    Friday, Apr. 21st, 2:00pm-3:00pm
    CEPSR 750
    From Low power to Predictive Analytics for VLSI - Beyond Guessing

    Moore’s law drives lowering cost/function ratio and thus pushes addition of more functions on a chip. This requires reduction in power. In Internet of Everything (IoE), System on Chip (SOC), flexible electronics, 3D printing the drive towards low power while maintaining functionality will be essential. Also power has become the key driving force in high performance processor designs as the frequency scale-up is reaching saturation. In order to achieve low power system, circuit and technology co-design is essential. This talk focuses on pros and cons analysis of technology and circuit techniques from power perspective and various techniques to exploit lower power. The talk highlights fundamentals and the direction for low power optimization such as reduction in active, leakage, short circuit power and collision power will continue to be the focal area for in the scaled world. Conventional and advanced techniques (e.g. clock gating, power gating, longer channel, multi-Vt design, stacking, header-footer device techniques and new developments etc.) will be described for logic and memories. Finally key challenges in achieving low power will be described.
    As the technology pushes towards sub-14nm era, process variability and geometric variation in devices can cause variation in power, performance and functionality. Predictive Analytics to capture systematic and random variation and to aid in robust design optimization in nm regime will be discussed. Also the talk will describe future growth directions and role of such predictive algorithms.

    Dr. Rajiv V. Joshi is a research staff member at T. J. Watson research center, IBM. He received his B.Tech I.I.T (Bombay, India), M.S (M.I.T) and Dr. Eng. Sc. (Columbia University). His novel interconnects processes and structures for aluminum, tungsten and copper technologies which are widely used in IBM for various technologies from sub-0.5µm to 14nm. He has led successfully predictive failure analytic techniques for yield prediction and also the technology-driven SRAM at IBM Server Group. He commercialized these techniques. He received 3 Outstanding Technical Achievement (OTAs), 3 highest Corporate Patent Portfolio awards for licensing contributions, holds 58 invention plateaus and has over 225 US patents and over 350 including international patents. He has authored and co-authored over 185 papers. He received the Best Editor Award from IEEE TVLSI journal. He is recipient of 2015 BMM award. He is inducted into New Jersey Inventor Hall of Fame in Aug 2014 along with pioneer Nikola Tesla. He is a recipient of 2013 IEEE CAS Industrial Pioneer award and 2013 Mehboob Khan Award from Semiconductor Research Corporation. He is a member of IBM Academy of technology. He served as a Distinguished Lecturer for IEEE CAS and EDS society. He is IEEE, ISQED and World Technology Network fellow and distinguished alumnus of IIT Bombay. He is in the Board of Governors for IEEE CAS. He serves as an Associate Editor of TVLSI. He served on committees of ISLPED (Int. Symposium Low Power Electronic Design), IEEE VLSI design, IEEE CICC, IEEE Int. SOI conference, ISQED and Advanced Metallization Program committees. He served as a general chair for IEEE ISLPED. He is an industry liaison for universities as a part of the Semiconductor Research Corporation. Also he is in the industry liaison committee for IEEE CAS society.

    Fall 2016 Seminars

    Past seminars
    ♦ 2016: Spring | Fall
    ♦ 2015: Spring | Fall
    ♦ 2014: Spring | Fall
    ♦ 2013: Spring | Fall
    ♦ 2012: Spring | Fall
    ♦ 2011: Spring | Fall
    ♦ 2010: Spring | Fall
    ♦ 2009: Spring | Fall
    ♦ 2008: Spring | Fall
    ♦ 2007: Spring | Fall
    ♦ 2006: Spring | Fall
    ♦ 2005: Spring | Fall
    ♦ 2004: Spring | Fall
    ♦ 2003: Spring | Fall
    ♦ 2002: Spring | Fall
    ♦ 2001: Spring | Fall
    ♦ 2000: Spring | Fall

    How to get to our seminar:

    Directions | Campus Map | Building Map

    Cisl Seminar Announcements Mailing List

  • We maintain a mailing list to distribute the CISL seminar announcements for anyone interested. This is a password protected list and its only purpose is to distribute announcements for the CISL seminar series.
  • Subscription and Unsubscription to the list is open and can be done at
  • Questions on any issue pertaining to this list should be directed to