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Fall 2011 Seminars
  • CMOS Switched-Capacitor Circuits: Recent Advances in Bio-Medical and RF Applications
    Speaker: Dr. David Allstot, Professor, University of Washington
    Date: December 2nd, 3:30pm
  • Lectures on Human Aspects of Engineering & Science (EDS/SSCS Distinguished Lecture)
    Speaker: Dr. Hanspeter Schmid, Research Fellow, University of Applied Sciences North-Western Switzerland
    Date: November 18th, 2:00pm
  • Electronic-Photonic Co-Design: RF Assisted Phase Control of Semiconductor Lasers
    Speaker: Dr. Firooz Aflatouni, Post Doctoral Scholar,California Institute of Technology
    Date: November 4th, 2:00pm
  • Silicon Circuits and mm-Wave Equalization Techniques for Emerging 40+ Gbps Short-Reach Application
    Speaker: Dr. Ricardo Aroca, Member of Technical Staff, High Speed Electronics & Optoelectronics Research Group, Bell Labs
    Date: October 14th, 2:00pm
  • Breaking the Speed Limit of a Continuous-Time Delta Sigma ADC by Compensating for More Than One Cycle Excess Loop Delay
    Speaker: Dr. Nagendra Krishnapura, Associate Professor, IIT Madras
    Date: September 22nd, 2:00pm


  • Dr. David Allstot
    Professor, University of Washington

    Date:
    December 2nd, 3:30pm
    Location:
    Interschool Lab(CEPSR 750)

    CMOS Switched-Capacitor Circuits: Recent Advances in Bio-Medical and RF Applications

    Abstract: The switched-capacitor technique has been used in high-volume data conversion and signal processing ICs for more than three decades. It is also ubiquitous in RF transceiver circuits because it uses capacitors, which are area-efficient native devices in CMOS technologies, and MOSFETs operating as switches. The RF power amplifier dissipates a large fraction of the total power of a transceiver because of its low efficiency. Despite more than two decades of intensive research, the challenge of on-chip RF PAs with high efficiency in digital-friendly CMOS technologies has not been met. Switching PA topologies with relatively high efficiency have gained momentum, and relatively high output power is being delivered using power combining techniques. Supply regulation techniques have enabled higher efficiency when amplifying non-constant envelope modulated signals. A new paradigm—the switched-capacitor RF power amplifier—which meets many of the remaining challenges is described. Body-area-networks (BAN) that integrate multiple sensor nodes in portable and wearable bio-medical systems are revolutionizing healthcare. A typical BAN comprises several bio-signal and motion sensors and uses ultra-low-power short-haul radios in conjunction with nearby smart-phones or handheld devices (with GPS capabilities) to communicate via the internet with a doctor or other healthcare professional. Higher energy efficiency is critical to the development of feature-rich, wearable and reliable personal health-monitoring systems. The amount of data transmitted to the smart-phone increases as more sensors are added to the BAN. Because the energy consumed for RF transmission is proportional to the data rate, it is advantageous to compress the bio-signal at the sensor prior to digitization and transmission. This energy-efficient paradigm is possible using compressed sensing—a new sampling theory wherein a compressible signal can be acquired using only a few incoherent measurements. For ECG signals, for example, compression factors up to 16X are achievable which means similar reductions in energy consumption. The second part of this talk overviews compressed sensing techniques and describes a switched-capacitor analog front-end for bio-signal acquisition.

    Biography:
    David J. Allstot received the B.S. from the Univ. of Portland, the M.S. from Oregon State Univ. and the Ph.D. from the Univ. of California, Berkeley. He has held several industrial and academic positions and has been the Boeing-Egtvedt Chair Professor of Engineering at the Univ. of Washington since 1999. He was Chair of the Dept. of Electrical Engineering from 2004 to 2007. Dr. Allstot has advised approximately 100 M.S. and Ph.D. graduates, published about 300 papers, and received several awards. He has also been active in service to IEEE.


    Dr. Hanspeter Schmid
    Research Fellow, University of Applied Sciences North-Western Switzerland

    Date:
    November 18th, 2:00pm
    Location:
    633 S.W.MUDD

    Lectures on Human Aspects of Engineering & Science

    Directions

    This seminar is part of the distinguished lecture series sponsored by the New York chapter of the IEEE EDS/SSCS, please visit http://edssscs.googlepages.com/


    The Current-mode story: This talk is about scientific facts, and how they interact with humans. Scientific facts are something made, not something discovered, they are created by researchers; they develop, change, and also disappear again. The major driving force behind this is that researchers deal with problems of such complexity that, as soon as they find a promising path through the confusing state of a project in its early phases, they will follow that path. They have to ignore many problems they see, to be dealt with later, because trying to deal with all problems at once means certain failure. The researchers deliberately constrain their thinking. This creates scientific facts, but also eventually lets researchers make unfounded statements with great conviction. This happens in every research field, but many researchers believe that "all the others" have "real" scientific methods. The reason for this believe in the "real" rationality of research in other fields comes from a selective reading of the publications of other fields. All this is shown in detail at the example of what happened since the 60s in current-mode research.

    Electrical and Human Feedback: This second talk deals with electrical feedback and how it interacts with humans. The conscious mind can only deal with a small number of criteria at a time, but it has been shown that the subconscious mind can weigh hundreds of criteria. Therefore two paths can be followed in technical projects: either you make the problem very simple (but less flexible), and then you can solve it quickly, in a straightforward way, by conscious effort, or you want to harness the creative power that lies in complexity, that allows you to develop things other groups cannot do, and then you need to create an environment in which the unconscious mind can solve the problem. An example for the first path is a special approach to integrated amplifier design (using as little feedback as possible) that made it possible to design a 16-channel analog pad driver to specs, and get it first time right, with only ten working days from scratch to verified layout. An example for the second path is a 19-bit resolution MEMS acceleration sensor system. Although the examples come from the microelectronics domain, the talk is targeted at all kinds of engineers (electronics and others).

    Biography:
    Dr. Hanspeter Schmid was an analog-IC designer with Bernafon AG, Switzerland, until 2005, where he mainly worked on audio low-noise amplifiers, voltage regulators, and a wireless transceiver, and was also responsible for full-system signal integrity. Now he is a Research Fellow at IME/FHNW and a senior lecturer at ETHZ. His main research interests are fast low power circuits (mainly for sensor electronics), signal integrity in analog signal processing, sigma-delta conversion and mixed-analog-digital signal processing. He also does consulting in industry projects. In addition to his technical work, he occasionally works as a conflict moderator or facilitator, and he gives communication courses and conflict prevention courses for engineers and for laymen. Hanspeter Schmid was IEEE CAS Analog Signal Processing Technical Committee Co-Chair from 2008 2010 and still is a committee member; he is an Associate Editor of TCAS-I, a member of the ESSCIRC technical committee, and a Distinguished Lecturer of the IEEE CAS Society.


    Dr. Firooz Aflatouni
    Post Doctoral Scholar,California Institute of Technology

    Date:
    November 4th, 2:00pm
    Location:
    627 S.W.MUDD

    Electronic-Photonic Co-Design: RF Assisted Phase Control of Semiconductor Lasers

    Abstract: The relative phase control of semiconductor lasers is the basis for many applications including RF assisted coherent power combining of semiconductor lasers and laser beam-forming. Also, absolute phase control of semiconductor laser (where the laser phase noise is reduced) is highly desired in many applications such as coherent optical communication (long-haul or chip-to-chip), interferometric sensing, LIDAR, and mm-wave and THz signal generations. These are examples of Electronic-Photonic Co-Design which can be categorized into two main aspects: (a) RF Assisted Photonics where RF and mm-wave circuits and techniques are employed to improve the performance of photonic systems, and (b) Photonic Assisted Electronics where photonic systems and devices are used to improve the performance of the RF and mm-wave systems. In this talk, I will present my work on RF assisted phase control of semiconductor lasers in both relative sense (coherent power combining) and absolute sense (laser phase noise reduction) and will discuss its advantages and limitations.

    Biography:
    Firooz Aflatouni received the B.S. degree in electrical engineering from the K.N.T. University of Technology, Tehran, Iran, in 1998, and the M.S. and Ph.D. degrees in electrical engineering from the University of Southern California, Los Angeles, in 2005 and 2011, respectively. In 1999, he co-founded Pardis Bargh Company, where he was involved in the designing of inclined- orbit satellite tracking systems. From 2004 to 2006, he was a Design Engineer with MediaWorks Integrated Circuits Inc., Irvine, CA. He is currently a Postdoctoral Associate in the department of electrical engineering at the California Institute of Technology, Pasadena, CA. His research interests include RF-inspired photonics and low power mm-wave and RF integrated circuits. He was the recipient of the 2011 USC department of electrical engineering best research presentation award, 2010 USC Ming Hsieh top 5 PhD student scholarship, 2010 NASA Tech Award for his work on development of a Ka-Band SiGe receiver front-end MMIC for space transponder applications, and the best B.S. thesis award for design and implementation of a non-geostationary satellite tracking system. He is the Silver medal winner of the nationwide Mathematics Olympiad in 1993.


    Dr. Ricardo Aroca
    Member of Technical Staff, High Speed Electronics & Optoelectronics Research Group, Bell Labs

    Date:
    October 14th, 2:00pm
    Location:
    CEPSR 414

    Silicon Circuits and mm-Wave Equalization Techniques for Emerging 40+ Gbps Short-Reach Application

    Abstract: With the introduction of the 100 Gigabit Ethernet and the GreenTouch technology initiative, there is a movement to replace power-hungry and analog-controlled I/O interface circuits (large-swing line/laser drivers, etc), with low-power and digitally-reconfigurable CMOS equivalents. Nano-scale CMOS offers the highest potential for integration, however, supply scaling and low breakdown voltages make it impractical to employ traditional high-speed equalization and waveshaping techniques. This talk will discuss several BiCMOS and CMOS transmitter circuits. In particular, the design and layout of a 2.4 Vpp, 60-Gb/s CMOS transmitter with digital equalization control will be presented as a demonstration of reliably pushing bulk 65-nm CMOS to the interface of short-reach communication links.

    Biography:
    Ricardo Andres Aroca received his B.A.Sc. (Hons) degree in electrical engineering from the University of Windsor, Canada, and the M.A.Sc. degree from the University of Toronto, Canada, in 2001 and 2004, respectively. Since 2005, he has been working towards the Ph.D. degree in electrical engineering at the University of Toronto, Canada. He is currently a Member of Technical Staff (MTS) at the Bell Labs division of Alcatel-Lucent, Murray Hill, NJ. His research interests lie in the design of low-power, digitally-rich and high-speed interface circuits for mm-wave communication systems.


    Dr. Nagendra Krishnapura
    Indian Institute of Technology, Madras

    Date:
    September 22nd, 2:00pm
    Location:
    CEPSR 414

    Breaking the Speed Limit of a Continuous-Time Delta Sigma ADC by Compensating for More Than One Cycle Excess Loop Delay

    Abstract: The maximum sampling rate of a continuous-time delta sigma modulator in a given process is limited by the minimum flash ADC delay that can be realized. Excess loop delay compensation techniques that are widely used can compensate for delays up to half a clock cycle. Addition of a fast loop outside the flash ADC can break this limit and compensate for upto one and half clock cycles of delay. This technique, along with a low latency flash ADC, and a delay free calibrated DAC, result in a continuous-time delta sigma ADC with the highest reported sampling rate in a 0.18um process. The prototype occupies 0.68mm^2, consumes 47.6mW,and operates at 800MS/s. In a 16MHz bandwidth\,(oversampling ratio of 25), the dynamic range, maximum signal to noise ratio, and maximum signal to noise and distortion ratios are 75dB, 67dB, and 65dB respectively. In a 32MHz bandwidth, the dynamic range, maximum signal to noise ratio, and maximum signal to noise and distortion ratios are 64dB,57dB and 57dB respectively.

    Biography:
    Nagendra Krishnapura obtained his BTech from the Indian Institute of Technology, Madras, India and his PhD from Columbia University, New York. He has worked as an analog design engineer at Texas Instruments, Bell Laboratories, Celight Inc., Multilink, and Vitesse semiconductor. He has taught analog circuit design courses at Columbia University as an adjunct faculty. He is currently an associate professor at the Indian Institute of Technology, Madras. His interests are analog and RF circuit design and analog signal processing.
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