Seminars Fall 2003

Abstract:

Accurate modeling of interconnect parasitics, passive components and passive component ensembles is a critical step in high-speed design. Traditional full Maxwell equation field solvers originating from the microwave community are accurate but are very inefficient and hence impractical to use for IC design. The current class of quasi-static solution techniques developed in the CAD community are efficient but often cannot meet the high-accuracy requirements of RF design. We introduce a new extraction tool EMX (ElectroMagnetic eXtractor) for the analysis of RF, analog and high-speed digital circuits. EMX uses a new version of a generalized Fast Multipole Method. It is a fast, integral-equation based, full-wave field solver which takes advantage of the layout ``regularity'' in typical design. In addition, a new formulation for the implementation of the vector Maxwell's equations is developed that significantly reduces computing resources. EMX is one to two orders of magnitude faster than the current class of approaches for solving similar problems. A number of designs such as inductors, Baluns, VCOs and RF Blocks have been simulated and designed with EMX and we show the comparison to measurement.

Abstract:

In the late 90's, communications was the fastest growing segment of the semiconductor industry driven by the internet boom and a perceived need for increased transmission, switching and processing capacity. Silicon providers focused on increasing port speed along with a reduced time to market. When the bubble burst, service providers cut back severely on capital expenditure and now look for new ways to increase revenue while reducing operating cost. In this new environment, silicon 'system on a chip' technology offers the possibility of increased functionality and flexibility while reducing overall system cost. This will be achieved using a combination of higher levels of integration, embedded software, reconfigurable hardware and new packaging technologies. This talk describes a number of examples of how system on a chip technology can be used to improve functionality while reducing overall cost in wired, wireless and storage applications. These examples will be used to identify some major architectural and implementation trends. Finally, we will take a look at some of the key challenges facing communication chip designers moving forward.

Abstract:

One of the big advances in wireless communication in recent times involves the use of multiple transmit antennas to realize enormous gains in spectral efficiency. Multiple-input multiple-output (MIMO) wireless systems generalize the concept of the Bell Labs Layed Space-Time (BLAST) coding scheme for spatial multiplexing. This talk will highlight algorithms and architectures for MIMO receivers that have been used to implement practical MIMO receivers in silicon. The results are shown in the context of the high speed downlink packet access (HSDPA) extension of UMTS for 3rd generation mobile communication, with a silicon chip that can achieve up to 28.8 Mb/s over a 5 MHz channel using up to a 4x4 QPSK MIMO configuration (5.76 bits/s/Hz). Some of the significant challenges include dealing with the self-interference caused by the loss of orthogonality between the spreading codes from a frequency-selective channel and implementing exponentially complex maximum likelihood (ML) MIMO detection algorithms efficiently in hardware. The talk will describe the key features of the ASIC and present some preliminary over-the-air measurements that attest to the performance of MIMO for HSDPA. Furthermore, the talk will highlight future implementation techniques for achieving even higher spectral efficiency by using “spherical” decoding techniques for MIMO receivers. Spherical decoding allows near-ML performance with only a fraction of the complexity for MIMO configurations like 4x4 16QAM, or 8x8 QPSK, which are much too complex to compute directly with ML.

Abstract:

The mission of the Cornell Broadband Communications Research Laboratory (CBCRL) is to develop fundamental device, circuits and systems knowledge in broadband communications systems by understanding issues that impact the design of high performance, energy efficient wireline and wireless systems. This talk will highlight some of the ongoing research activities, particularly our low power 3G WCDMA receiver, 60 GHz radio, and 10 Gb/s low power integrated optical transceiver work. The design challenges associated with each of these activities are presented along with mixed-signal circuit solutions that are used or proposed to overcome them.