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Research   Seminars

Spring  2010

  Previous Seminars

   Dr. Hoi Lee
University of Texas at Dallas
DateApril 30th, 2:00pm, 414 CESPR/Schapiro
Topic:  Analog Circuit Techniques for Power Management Applications


This talk describes analog circuit techniques to improve performances of a wireless power transmission system in cochlear implants and a portable power management system in handheld electronic devices. In the wireless power transmission system, high system power efficiency is crucial not only to prolong the battery runtime but also to minimize the potential tissue damage caused by overheating. New circuit architectures/techniques in both the integrated CMOS rectifier and the switched-capacitor charge pump that are embedded inside the body will be addressed to improve the system power efficiency. In portable power management applications, both switched-mode DC/DC converters (SMPC) and low-dropout regulators (LDO) are fundamental power modules. This talk will also discuss using dynamically-biased shunt feedback to improve transient response of the LDO and to enable SMPC to operate at high switching frequencies through increasing the current-sensing speed under low power condition.



Dr. Hoi Lee received the B.Eng., M.Phil., and Ph.D. degrees in electrical and electronic engineering from the Hong Kong University of Science and Technology in 1998, 2000, and 2004, respectively. In January 2005, he joined the Department of Electrical Engineering, University of Texas at Dallas, where he is an Assistant Professor. His current research interests include power management integrated circuits for portable, energy harvesting, solid-state lighting, and biomedical applications, integrated bioelectronics for cochlear and neural prosthesis, and low-voltage low-power analog and mixed-signal circuit techniques. Dr. Lee was the recipient of the Best Student Paper Award at the 2002 IEEE Custom Integrated Circuits Conference. He has served as an Associate Editor of the IEEE Transactions on Circuits and Systems-II from 2007 to 2009. He is currently on the Technical Program Committee of the IEEE Custom Integrated Circuits Conference, and the Analog Signal Processing and the Power Systems and Power Electronic Circuits Technical Committees of the IEEE Circuits and Systems Society

      Dr. Sudhakar Pamarti
University of California at Los Angeles

DateApril 23rd, 2:00pm,  414 CESPR/Schapiro
Topic:  Digital Signal Conditioning Techniques for the Analog Circuit Designer


Mixed-signal circuits are critical components in most electronic systems. Aggressive integrated circuit technology scaling has placed on them both tremendous performance demands and severe challenges such as transistor non-linearity, process variability etc. This talk will present a choice selection of digital signal processing techniques that exploit the relative abundance of inexpensive digital logic to overcome the aforementioned challenges and enable high performance in mixed-signal circuits. Specifically, techniques that
"condition" the statistical properties of signals being processed by the mixed-signal circuits, making them inherently immune to circuit imperfections, will be described. Example applications to frequency
synthesizers, power amplifiers, and wired communication transceivers will be presented.

Speaker Biography

Dr. Sudhakar Pamarti is an assistant professor of electrical engineering at the University of California, Los Angeles, where he teaches and conducts research in the fields of mixed-signal circuit design and signal processing. Dr. Pamarti received the M.S. and the Ph.D. degrees in electrical engineering from the University of California at San Diego in 1999 and 2003, respectively, and the Bachelor of Technology degree in electronics and electrical communications engineering from the Indian Institute of Technology, Kharagpur in 1995. Prior to joining UCLA, he has worked at Rambus Inc. (‘03-`05) and Hughes Software Systems (‘95-`97) developing high speed I/O circuits and embedded software and firmware for a wireless-in-local-loop communication system respectively. Dr. Pamarti has served on the editorial board of the IEEE Transactions on Circuits and Systems II and is a recent recipient of the NSF CAREER award.

      Dr. Poras Balsara
University of Texas at Dallas

DateApril 2nd, 10:30am,  414 CESPR/Schapiro
Topic:  Energy Efficient Digital Design


As CMOS technology shrink and device densities on a chip increase, power dissipationis rapidly becoming the most important design concern.  This talk will present some early results from our recent work involving device sizing for low power digital design.  The  technique presented will enable quick exploration of different architectures and circuit topologies in order to analyze energy and delay trade-offs for a given functional block in a system. 

Speaker Biography

 Poras T. Balsara is a Professor of Electrical Engineering at the University of Texas at Dallas.  He received his MS and PhD degree from the Penn State University in 1985 and 1989, respectively.   His research interests include, VLSI design, design of energy efficient digital systems, circuits and systems for DSP and communications, digitally-intensive RF and mixed-signal circuits, and computer arithmetic.  He has published several journal and conference papers in these areas

      Dr. Rahul Sarpeshkar
Massachusetts Institute of Technology

DateMarch 26th, 2:00pm,  414 CESPR/Schapiro
Topic:  Bioelectronics


Nature is a great analog and digital circuit designer. She has innovated circuits in the biochemical, biomechanical, and bioelectronic domains that operate very robustly with highly imprecise parts and with incredibly low levels of power. I will discuss how analog and bio-inspired circuits and architectures have led to and are leading to novel architectures in sensing and computing, e.g., in ear-inspired radios, architectures for improving operation in noise, neuron-inspired signal-to-symbol conversion, and hybrid analog-digital architectures that are inspired by computations within cells. Such techniques can lead to highly energy-efficient parallel architectures that operate rapidly and precisely and solve computationally intensive tasks. I will provide examples from systems built in my lab for bionic ear processors for the deaf, brain-machine interfaces for the blind and paralyzed, and body sensor networks for cardiac monitoring.

Speaker Biography

Rahul Sarpeshkar obtained Bachelor's degrees in Electrical Engineering and Physics at MIT. After completing his PhD at Caltech, he joined Bell Labs as a member of the technical staff. Since 1999, he has been on the faculty of MIT's Electrical Engineering and Computer Science Department, where he is an Associate Professor and heads a research group on Analog VLSI and Biological Systems. He has received the Packard Fellow Award given to outstanding faculty, the ONR Young Investigator Award, the NSF Career Award, the Indus Technovator award, and the Junior Bose Award for excellence in teaching at MIT. He holds over 25 patents and has authored more than 100 publications, including one that was featured on the cover of Nature. His research interests include analog microelectronics, ultra-low-power circuits and systems, biologically inspired circuits and systems, biomedical systems, feedback systems, neuroscience, and molecular biology.  His book, "Ultra Low Power Bioelectronics: Fundamentals, Biomedical Applications, and Bio-inspired Systems" was released in February 2010 and contains a broad and deep treatment of the fields of bioelectronics and ultra low power electronics.

     Dr. Kofi Makinwa
Delft University of Technology

DateMarch 12th, 2:00pm,  414 CESPR/Schapiro
Topic:  Using Heat to Measure Temperature


This seminar is part of the distinguished lecture series sponsored by the New York chapter of the IEEE EDS/SSCS, please visit


Temperature sensors are everywhere! They are used in CPUs for thermal management, in DRAMs to control refresh rates, and in MEMS frequency references for temperature compensation, to name a few high volume applications. Conventional temperature sensors are based on bipolar transistors, and must be trimmed to compensate for the inaccuracy (about 3 degree Celsius) caused by process spread. However, trimming is a time consuming process that significantly increases manufacturing costs. This talk will discuss recent research on temperature sensors based on the thermal diffusivity of silicon, i.e. the rate at which heat diffuses through silicon. Due to the purity of IC-grade silicon, such temperature sensors achieve untrimmed inaccuracies of 0.2 degrees Celsius, which is much better than that of conventional sensors.

Speaker Biography

Kofi A.A. Makinwa is a Professor at Delft University of Technology, The Netherlands, where he leads a group that designs precision analog circuits, ΣΔ modulators, and smart sensors. He holds B.Sc. and M.Sc. degrees from Obafemi Awolowo University, Nigeria, an M.E.E. degree from the Philips International Institute and a Ph.D. degree from Delft University of Technology, both in The Netherlands. From 1989 to 1999 he was a research scientist at Philips Research Laboratories. He holds 14 patents, has (co)-authored over 100 technical papers, and has given tutorials at the ISSCC and several other conferences. Dr. Makinwa is a (co)-recipient of JSSC, ISSCC (3), ESSCIRC, ISCAS and IEEE Sensors best paper awards, and is a recipient of the Simon Stevin Gezel award from the Dutch Technology Foundation. He is a distinguished lecturer of the IEEE and a member of the Young Academy of the Royal Netherlands Academy of Arts and Sciences.

     Dr. Yorgos Palaskas
Intel Corporation

DateFebruary 26th, 2:00pm,  414 CESPR/Schapiro
Topic:  Radio Design Concepts for SoC's


This talk reviews recent developments in radio design for Systems-on-Chip implemented in heavily scaled CMOS processes. We review 3 specific concepts and associated prototypes: (1) 28dBm outphasing power amplifier based on inverters for OFDM applications, (2) frequency divider-by-1.25 with 60dB-accurate digital calibration for pulling-immune LO generation and (3) 2.5GHz digital modulator implemented using automatic digital synthesis techniques. These techniques take advantage of the fine time resolution and extreme digital processing power afforded by advanced CMOS processes, and they show a new radio design paradigm emerging for SoC applications.

Speaker Biography

Yorgos Palaskas received the Diploma in Electrical and Computer Engineering from the National Technical University of Athens, Greece, in 1996, and the M.S. and Ph.D. degrees, both in Electrical Engineering, from Columbia University, New York, in 1999 and 2002, respectively. Since January 2003 he has been Intel Labs, Hillsboro, Oregon, where he is currently an Engineering Manager. His research focuses on wireless transceivers for WiMAX-WLAN and 60GHz in nanometer CMOS technologies. He is currently serving on the Technical Program Committee for the IEEE International Solid-State Circuits Conference and the IEEE European Solid-State Circuits Conference.


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