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Spring 2018: Upcoming Seminars

  • [CANCELLED]Computing with Dynamical Systems
          Speaker: Prof. Arijit Raychowdhury
  •       Date: Friday, May. 4th, 2pm, MUDD233 [CANCELLED]






    Prof. Hua Wang
    Georgia Tech University
    Date:
    Friday, Jan. 19th, 2:00pm-3:00pm,
    Location:
    CEPSR 750
    Using Moore's Law to Break Eroom's Law? --- Multimodal CMOS Cellular Interface for High Throughput Drug Screening and New Drug Development.

    Abstract:
    Cells are highly complex systems that often exhibit multi-physics responses under external stimulus. To achieve holistic cellular characterizations, it is essential to create interfaces that can provide (1) single-cell resolution, (2) multi-modality interfacing with cells, (3) real-time two-way communication (sensing and actuation), (4) compatibility with high throughput massively parallel operations, and (5) possibility of production at commercial quantities. The nanometer-scale complementary metal-oxide semiconductor (CMOS) process is a potential candidate to realize cell-microelectronics interfaces. Electronics-based computations and signal processing, such as machine learning methods, may drastically relax the requirement on the physical interface and lead to further pixel miniaturization.
    In this talk, we will present several fully integrated multi-modality CMOS cellular joint sensor/actuator arrays with multiple sensing modalities in every array pixel to characterize different cell physiological responses, including extracellular voltage recording, cellular impedance mapping, and optical detection with shadow imaging and bioluminescence sensing. Each pixel also contains electrical voltage/current excitation for cellular stimulation. These reported CMOS cellular joint sensor/actuator arrays comprise up-to 22k multi-modality pixels on each chip with spatial resolution down to 17um*17um/pixel, achieving single-cell resolution. Multi-modality cellular sensing at the pixel level is supported, which enables holistic cell characterization and concurrent joint-modality physiological monitoring on the same cellular sample. Comprehensive biological experiments with different living cell samples demonstrate the functionality.

    Biography:
    Hua Wang received his M.S. and Ph.D. degrees in electrical engineering from the California Institute of Technology, Pasadena, in 2007 and 2009, respectively. He worked at Intel Corporation and Skyworks Solutions before joining the School of Electrical and Computer Engineering at Georgia Institute of Technology as an assistant professor in 2012.
    Dr. Wang received the National Science Foundation CAREER Award in 2015, the IEEE MTT-S Outstanding Young Engineer Award in 2017, the Georgia Tech Sigma Xi Young Faculty Award in 2016, the DURIP Award in 2014, the Georgia Tech ECE Outstanding Junior Faculty Member Award in 2015, and the Lockheed Dean’s Excellence in Teaching Award in 2015. He currently holds the Demetrius T. Paris Junior Professorship of the School of ECE at Georgia Tech. His research group Georgia Tech Electronics and Micro-System (GEMS) lab has won multiple best paper awards, including the IEEE RFIC Best Student Paper Awards in 2014 (1st Place) and 2016 (2nd Place), the IEEE CICC Best Student Paper Awards in 2015, the 2016 IEEE Microwave Magazine Best Paper Award, the 2016 IEEE SENSORS Best Live Demo Award (2nd Place), as well as multiple best paper award finalists at IEEE conferences.
    Dr. Wang is an Associate Editor of the IEEE Microwave and Wireless Components Letters (MWCL). He is a Technical Program Committee (TPC) Member for IEEE International Solid-State Circuits Conference (ISSCC) and a Steering Committee member for IEEE Radio Frequency Integrated Circuits Symposium (RFIC) and IEEE Custom Integrated Circuits Conference (CICC).


    Dr. Roy (Troy) Olsson
    PM, DARPA, Arlington, VA
    Date:
    Friday, Feb. 2nd, 2:00pm-3:00pm
    Location:
    Davis Auditorium
    Living on the Edge of the IoT: Sensing and Communicating in Energy Starved Environments

    Abstract:
    Wireless communications and miniature sensing technologies have developed significantly over the past decade with the advent of the smart phone. However, the communications and sensing technologies developed around the cellular handset market are largely incompatible in energy consumption, frequency band, and data rate with agricultural, environmental, infrastructure, and industrial sensing, referred to here as the edge of the internet-of-things (IoT). While communications for consumer wireless sensors have primarily developed in the 2.4 GHz ISM band, the radio frequency (RF) propagation losses at this frequency are extremely high both on the ground and through structural materials and foliage. In contrast to cellular phones that can recharge relatively large batteries daily, edge IoT sensors must operate for many years without plugging in to recharge the battery or, in some cases, without a battery at all. The low carrier frequencies and energy expense of RF transmissions necessitates sensing and processing technologies for detecting, classifying and compressing the large amount of sensor data into useful information, while the amount of energy available is orders of magnitude lower than a smart phone.
    This seminar will present microtechnologies for communications and sensing that are compatible with the stringent energy consumption, data rates and operating frequencies needed at the edge of the IoT. Microelectromechanical resonators for providing high performance, miniature, and low cost RF components in the 150 MHz to 400 MHz bands needed for ground emplaced and structural sensors will be discussed. A new class of intelligent nanowatt wakeup sensors and radio receivers will also be presented. These wakeup components can detect and classify sensor and RF signatures while consuming lower power than the leakage rate of a small battery, greatly extending the lifetime of energy constrained wireless sensor nodes. Finally, technology gaps and new research areas needed to fully deploy long-life sensors at the edge of the IoT will be identified.

    Biography:
    Roy (Troy) H. Olsson III is a program manager in the Microsystems Technology Office (MTO) at the Defense Advanced Research Projects Agency (DARPA). His research interests include materials, devices, and architectures for low-power processing of wireless and sensor signals, miniature antennas, and phased array antennas. Prior to joining DARPA, Troy was a Principal Electronics Engineer in the MEMS Technologies Department at Sandia National Laboratories in Albuquerque, NM. At Sandia, Troy led research programs in aluminum nitride and lithium niobate piezoelectric micro-devices for processing of RF, inertial and optical signals. He received B.S. degrees (Summa Cum Laude) in electrical engineering and in computer engineering from West Virginia University in 1999 and the MS and Ph.D. degrees in electrical engineering from the University of Michigan, Ann Arbor in 2001 and 2004. His graduate research was in the area of low power electronics and sensor arrays for interfacing with the central nervous system.
    Troy has authored more than 100 technical journal and conference papers and holds 27 patents in the area of microelectronics and microelectromechanical systems (MEMS). He served on the organizing committee of the 2011 Phononics Conference and was a Member of the Technical Program Committee for the IEEE Ultrasonics Symposium (IUS) from 2010-2016. He is a Senior Member of the IEEE and a Member of the IEEE Solid State Circuits Society; the IEEE Ultrasonics, Ferroelectrics, and Frequency Control Society; Eta Kappa Nu; and Tau Beta Pi. He was awarded an R&D100 award in 2011 for his work on Microresonator Filters and Frequency References and was named the 2017 DARPA program manager of the year.


    Dr. Pietro Andreani
    Lund University
    Date:
    Monday, Feb. 5th, 2:00pm-3:00pm
    Location:
    CEPSR 414
    SSCS Distinguished Lecture: RF Harmonic Oscillators Integrated in Silicon Technologies

    Abstract:
    As one of the truly fundamental analog functions in any wireless/wireline application, the voltage-controlled oscillator keeps attracting a great deal of well-deserved attention. In this presentation, we will investigate the mechanisms of phase noise generation in harmonic oscillators, including some recently published general results, after which we will analyze both classical and emergent oscillator architectures, describing pros and cons for each. Various techniques to achieve a very wide oscillator tuning range will be illustrated as well.

    Biography:
    Pietro Andreani received the M.S.E.E. degree from the University of Pisa, Italy, in 1988, and the Ph.D. degree from Lund University, Sweden, in 1999. Between 2001 and 2007 he was chair profes­sor at the Center for Physical Electronics, Technical University of Denmark. From 2005 to 2014 he had a 20% position as analog/RF designer at Ericsson AB in Lund, Sweden. Since 2007, he has been associate professor at the dept. of Electrical and Information Technology (EIT), Lund University, working in analog/mixed-mode/RF IC design. He has also been the head of the VINNOVA Center for System Design on Silicon, hosted by EIT, between 2014 and 2016. He has been a TPC member of ISSCC (2007-2012), is a TPC member of ESSCIRC (chair of the Frequency Generation subcommittee since 2012, TPC chair in 2014) and RFIC, and Associate Editor of JSSC. He has been an IEEE SSCS Distinguished Lecturer since 2017. He has authored numerous papers on harmonic oscillators and phase noise, for which he has been elevated to IEEE Fellow in 2018.


    Dr. Wooram Lee
    IBM T. J. Watson Research Center
    Date:
    Friday, March. 23rd, 2:00pm-3:00pm
    Location:
    MUDD 227
    Taming Waves in High Frequency IC Design

    Abstract:
    Waves are everywhere: the strings of musical instruments, a curious cloud pattern, the distribution of cars on a highway, and radio waves among mobile devices. In this talk, we focus on electromagnetic waves in high-frequency ICs, and discuss how they can be properly controlled to perform useful functions by engineering linear and nonlinear propagation media. Based on this approach, I will present four IC examples implemented in a CMOS process for 1) a new type of tunable delay line, 2) efficient clock distribution, 3) passive frequency division, and 4) <10-ps pulse generation.

    Biography:
    Wooram Lee is currently a Research Staff Member in the RF Circuits and Systems Group at the IBM T. J. Watson Research Center, where he is involved with the development of high performance mmWave phase array circuits and systems and highspeed serial link transceivers for optical communication. He is also an Adjunct Assistant Professor at Columbia University. He received his B.Sc. and M.S. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST) in 2001 and 2003, and his Ph.D degree at Cornell University in 2012. From 2012 to 2015, he was with Broadcom, CA, where he worked on multi-Gbps CMOS transceivers and data converters for broadband communication in optical, copper and backplane applications. He received the IEEE Solid-State Circuits Pre-doctoral Fellowship for 2010-2011 and the Samsung Graduate Fellowship for 2007-2012. He was a recipient of the Best Paper Award of the IEEE Radar Conference in 2009.


    Dr. Christos Vezyrtis
    IBM T. J. Watson Research Center
    Date:
    Friday, April. 13th, 2:00pm-3:00pm
    Location:
    MUDD 227
    Power Supply Noise in Server Chips: improving Power/Performance on IBM's Latest 14nm Processors

    Abstract:
    Enterprise server chip design poses a hard power-supply noise problem. Increasing transistor counts and supply voltage scaling can create instantaneous changes in current, driving nanosecond-speed supply voltage (VDD) droops that require extra guard-band for correct product operation. The POWER9TM and z14TM processor use advanced mitigation techniques such as adaptive clocking and instruction throttling to ensure that processor functionality is maintained during power- supply droops. We will present the POWER9TM  adaptive clocking strategy, embedding analog voltage-droop monitors (VDMs) that direct a digital phase-locked loop (DPLL) to immediately reduce clock frequency in response to a droop, and the z14TM advanced noise mitigation throttling options using the critical path monitor (CPM).

    Biography:
    Christos Vezyrtzis received the B. Eng. degree from the National Technical University of Athens, Greece in 2006, and M.Phil, M.S. and Ph.D. degrees from Columbia University, New York, NY. He is now a Research Staff Member at IBM T.J. Watson Research Center, Yorktown, NY, and has served as Adjunct Assistant Professor at Columbia University, New York, NY. His research interests include high-speed mixed-signal and digital circuits. He was the recipient of the Best Paper Award for the Logic and Circuits track at IEEE International Conference on Computer Design (ICCD) in 2006. He has co-authored twelve patents.


    Prof. Hossein Hashemi
    University of Southern California
    Date:
    Friday, April. 27th, 2:00pm-3:00pm
    Location:
    MUDD 227
    Monolithic Optical Phased Arrays

    Abstract:
    Advancements in semiconductor manufacturing, computer-aided design tools, and integrated circuit architectures have enabled monolithic realization of 1 – 100 GHz radiofrequency phased arrays in commercial foundry processes for automotive radars, commercial wireless communications (e.g., 5G), and other applications. Optical phased arrays enable imaging, sensing, display, holography, free space optical communications, and many other applications. For instance, a phased array lidar reduces the size, weight, and power consumption of traditional mechanically-scanning lidars while it enhances the reliability, flexibility, and functionality. Challenges associated with monolithic realization of optical phased arrays include compact realization of optical phased array components; sensitivity of the phased array to fabrication tolerances and process variations given the short wavelength of optical frequencies; inadequate models, CAD tools, and systematic design methodologies. In this talk, it is shown that a holistic approach that takes inspirations from complex radio-frequency integrated circuits can enable realization of complex optical integrated circuits with unprecedented functionalities. The talk will cover the basics, applications, and past realizations of optical phased arrays followed by our demonstrations of large-scale monolithic optical phased arrays in a commercial foundry CMOS SOI technology. The talk will also cover design of silicon photonic components that benefit large-scale realization of optical phased arrays. Ongoing challenges and research directions will also be discussed.

    Biography:
    Hossein Hashemi is a Professor of Electrical Engineering, Ming Hsieh Faculty Fellow, and the co-director of the Ming Hsieh Institute at the University of Southern California. His research interests include analog, mixed-signal, and radio-frequency integrated circuits; photonic integrated circuits; electro-optical integrated systems; and implantable integrated solutions. He received the B.S. and M.S. degrees in Electronics Engineering from the Sharif University of Technology, Tehran, Iran, in 1997 and 1999, respectively, and the M.S. and Ph.D. degrees in Electrical Engineering from the California Institute of Technology, Pasadena, in 2001 and 2003, respectively. Hossein is an Associate Editor for the IEEE Journal of Solid state Circuits (2013 – present). He was a Distinguished Lecturer for the IEEE Solid-State Circuits Society (2013 – 2014); member of the Technical Program Committee of IEEE International Solid-State Circuits Conference (ISSCC) (2011 – 2015), IEEE Radio Frequency Integrated Circuits (RFIC) Symposium (2011 – present), and the IEEE Compound Semiconductor Integrated Circuits Symposium (CSICS) (2010 – 2014); an Associate Editor for the IEEE Transactions on Circuits and Systems—Part I: Regular Papers (2006–2007) and the IEEE Transactions on Circuits and Systems—Part II: Express Briefs (2004–2005); and Guest Editor for the IEEE Journal of Solid state Circuits (Oct 2013 & Dec 2013). Hossein was the recipient of the 2016 Nokia Bell Labs Prize, 2015 IEEE Microwave Theory and Techniques Society (MTT-S) Outstanding Young Engineer Award, 2008 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, and a National Science Foundation (NSF) CAREER Award. He received the USC Viterbi School of Engineering Junior Faculty Research Award in 2008, and was recognized as a Distinguished Scholar for the Outstanding Achievement in Advancement of Engineering by the Association of Professors and Scholars of Iranian Heritage in 2011. He was a co-recipient of the 2004 IEEE Journal of Solid-State Circuits Best Paper Award for “A Fully-Integrated 24 GHz 8-Element Phased-Array Receiver in Silicon” and the 2007 IEEE International Solid-State Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper for “A Fully Integrated 24 GHz 4-Channel Phased-Array Transceiver in 0.13um CMOS based on a Variable Phase Ring Oscillator and PLL Architecture”. Hossein is the co-editor of the books “Millimeter-Wave Silicon Technology: 60 GHz and Beyond” published by Springer in 2008, and “mm-Wave Silicon Power Amplifiers and Transmitters” published by the Cambridge University Press in 2016.


    Dr. Arijit Raychowdhury
    GeorgiaTech University
    Date:
    Friday, May. 4th, 2:00pm-3:00pm[CANCELLED]
    Location:
    MUDD233 [CANCELLED]
    Computing with Dynamical Systems

    Abstract:
    Collective dynamical systems offer unique opportunities for computing by harnessing the complex interactions of simple elements such as oscillators or spike generators. This is possible, when such dynamics can be programmed, controlled, and observed. In this talk, I will present some of our work where we are exploring the time-evolution of both deterministic and stochastic dynamical systems in both CMOS and post-CMOS computing substrates. I will show applications of such systems in solving inverse problems, distributed optimizations (convex and combinatorial) and machine learning. In particular, I will discuss our recent work that connects dynamics and algebraic graph theory. Finally I will talk about implementation of such dynamics in mixed-signal CMOS, including a recent demonstration of reinforcement learning for energy-constrained edge devices. I will conclude with a brief discussion of the opportunities, potentials and challenges in realizing such computational systems.

    Biography:
    Arijit Raychowdhury is an Associate Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology where he joined in January, 2013. He currently holds the ON Semiconductor Jr Professorship and is the Associate Director of the Center for Co-Design of Chips, Packaging and Systems. He received his Ph.D. degree in Electrical and Computer Engineering from Purdue University in 2007. Prior to joining academia, he was a staff scientist at Intel's Circuit Research Labs for five years where he worked on mixed signal and digital designs for energy-efficiency sensors and compute nodes. Before that, he spent one and a half years at Texas Instruments where he worked on developing the world’s first adaptive echo cancellation unit for DSL modems, which received the EDN industrial design award. Dr. Raychowdhury holds more than 25 U.S. and international patents and has published over 150 articles in journals and refereed conferences. He and his students have won multiple best paper awards, fellowships and best thesis awards.


    Spring 2018 Seminars

  • Title: Using Moore's Law to Break Eroom's Law? --- Multimodal CMOS Cellular Interface for High Throughput Drug Screening and New Drug Development.
          Speaker: Prof. Hua Wang
  •       Date: Friday, Jan. 19th, 2pm, CEPSR 750

  • Title: Living on the Edge of the IoT: Sensing and Communicating in Energy Starved Environments
          Speaker: Dr. Roy (Troy) Olsson, DARPA
  •       Date: Friday, Feb. 2nd, 2pm, Davis Auditorium

  • Title: RF Harmonic Oscillators Integrated in Silicon Technologies
          Speaker: Dr. Pietro Andreani
  •       Date: Monday, Feb. 5th, 2pm, CEPSR 414

  • Title: Taming Waves in High Frequency IC Design
          Speaker: Dr. Wooram Lee
  •       Date: Friday, March. 23rd, 2pm, MUDD 227

  • Title: Power Supply Voltage Droop Mitigation in IBM 14nm POWER 9TM and z14TM Processors
          Speaker: Dr. Christos Vezyrtis
  •       Date: Friday, April. 13th, 2pm, MUDD 227

  • Title: Monolithic Optical Phased Arrays
          Speaker: Prof. Hossein Hashemi
  •       Date: Friday, April. 27th, 2pm, MUDD 227

  • Title: Computing with Dynamical Systems
          Speaker: Prof. Arijit Raychowdhury
  •       Date: Friday, May. 4th, 2pm, MUDD233 [CANCELLED]


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