FPGA prototyping board specially-built for EE E4340 to design a real working PDP-8 minicomputer!

The VLSI CAD Lab in Mudd 1212 will be open Mon-Fri, 3-6 PM. Overflow space is available in Mudd 1235 (log into the PCs under FreeBSD and telnet to the Sun workstations) which is available for 24-hour access. The Hardware Prototyping Lab in Mudd 1211 will be availabe with 24-hour access.

Course handouts

• Syllabus (PS) (PDF)
• VHDL examples (PS) (PDF)
• VHDL for traffic light controller (PS)
• Leapfrog waveform plots for traffic light controller (PS)
• Composer/Leapfrog tutorial (PS)
• PDP-8 dataflow schematic (PS)
• Basic dataflow elements in VHDL (PS)

Homeworks

• Homework #1 (PS) (PDF) Due: 2/4/1999
• Homework #2 (PS) (PDF) Due: 2/18/1999
• Homework #3 (PS) (PDF) Due: 3/2/1999
• Homework #4 (PS) (PDF) Due: 3/23/1999
• Midterm (PS) Given: 3/11/1999
• Homework #5 (PS) (PDF) Due: 4/5/1999

Class Newsgroup (columbia.spring.elen4340)