Handouts :
| #1 | Syllabus | |
| #2 | Problem Set 1 | |
| #3 | VHDL handout | |
| #4 | VHDL design entry and simulation tutorial | |
| #5 | Problem Set 2 | |
| #6 | Laboratory 1 | |
| #7 | Laboratory 2 | |
| #8 | Laboratory 3 | |
| #9 | Laboratory 4 | |
| #10 | FPGA tutorial | |
| #11 | Final project report and presentation guidelines |