ANNOUNCEMENTS: 

(3/2/2002) There will be an optional recitation section on Sunday, March 3 at 7 PM in Mudd 227.

(3/2/2002) The mini design project #1 due date is extended to Wednesday, March 6.

IMPORTANT:    Please make sure that you have received an e-mail from me and you are on the class mailing list.  This is particularly important for CVN students.

This courses focuses on full-custom circuit design techniques for high-performance, low-power digital integrated circuits at the leading-edge of scaled CMOS technology. There will be several ``mini-design" projects integrated into the course in addition to traditional problem sets. Extensive use of the CAD tools in Columbia's environment will be required. On-campus use of the tools is preferred and will be the only form of access that we will be able to support. Remote access is possible, but we will not be able to guarantee full support for remote users.

Undergraduates with the required prerequisite (EE E4321) may register for the course with the permission of the instructor.

• Instructor
• Grader
• Textbook and references
• Online course reader
• Handouts
• Course schedule
• Grading
• Class bulletin board
• CAD tool and technology information
  • General information
  • On-line CISL CAD tutorial on layout
  • On-line CISL CAD tutorial on DRC/LVS
  • On-line CISL CAD tutorial on extraction
  • Discussion of layout-dependent device models
  • Submitting layouts for evaluation

Also visit the CVN(Columbia Video Network) site of EE E6930 here

Questions or comments for improvement of this page to shepard@ee.columbia.edu
Last Updated : 11/19/01